David Patterson (computer scientist)

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This article is about the American computer scientist. For other spellings and people of the same name, see David Patterson (disambiguation).
David Patterson
David A Patterson.jpg
Born (1947-11-16) November 16, 1947 (age 71)
Evergreen Park, Illinois
NationalityAmerican
Alma materUCLA
Known forRISC
RAID
Network of Workstations
AwardsTuring Award (2017)
Eckert–Mauchly Award[1] (2008)
ACM Distinguished Service Award (2007)
Computer History Museum Fellow (2007)
National Academy of Engineering Member
National Academy of Sciences Member
AAAS Fellow
ACM Fellow (1994)
IEEE Fellow
Karl Karlstrom Outstanding Educator Award (1991)
Scientific career
InstitutionsUniversity of California, Berkeley
ThesisVerification of Microprograms[2] (1976)
Doctoral advisorDavid F. Martin
Gerald Estrin
Doctoral students

David Andrew Patterson (born November 16, 1947) is an American computer pioneer and academic who has held the position of Professor of Computer Science at the University of California, Berkeley since 1976. He announced retirement in 2016 after serving nearly forty years and became a distinguished engineer at Google.[3][4] He currently is Vice Chair of the Board of Directors of the RISC-V Foundation,[5] and the Pardee Professor of Computer Science, Emeritus at UC Berkeley.

Patterson is noted for his pioneering contributions to RISC processor design, having coined the term RISC, and by leading the Berkeley RISC project.[6]As of 2018, 99% of all new chips use the RISC architecture.[7][8] He is also noted for leading the research on RAID storage together with Randy Katz.[9]

His books on computer architecture (co-authored with John L. Hennessy) are widely used in computer science education. Along with Hennessy, Patterson won the 2017 Turing Award for their work in developing RISC.

Background[edit]

A native of Evergreen Park, Illinois, David Patterson attended UCLA, receiving his B.A. in 1969, M.S. in 1970 and Ph.D. (advised by David F. Martin and Gerald Estrin) in 1976.[10]

Research[edit]

He is an important proponent of the concept of reduced instruction set computing and coined the term "RISC".[6] He led the Berkeley RISC project from 1980 along with Carlo H. Sequin, where the technique of register windows was introduced. He is also one of the innovators of the redundant arrays of independent disks (RAID) in collaboration with Randy Katz and Garth Gibson.[9][11]

Past positions[edit]

Past chair of the Computer Science Division at U.C. Berkeley and the Computing Research Association, he served on the Information Technology Advisory Committee for the U.S. President (PITAC) during 2003–05 and was elected president of the Association for Computing Machinery (ACM) for 2004–06.[12]

Awards[edit]

His work has been recognized by about 35 awards for research, teaching, and service, including Fellow of the Association for Computing Machinery (ACM)[13] and the Institute of Electrical and Electronics Engineers (IEEE) as well as by election to the National Academy of Engineering, National Academy of Sciences, and the Silicon Valley Engineering Hall of Fame. In 2005 he and Hennessy shared Japan's Computer & Communication award and, in 2006, was elected to the American Academy of Arts and Sciences and the National Academy of Sciences and received the Distinguished Service Award from the Computing Research Association. [12] In 2007 he was named a Fellow of the Computer History Museum "for fundamental contributions to engineering education, advances in computer architecture, and the integration of leading-edge research with education."[14] That same year he was also named a Fellow of the American Association for the Advancement of Science. In 2008, won the ACM Distinguished Service Award, the ACM-IEEE Eckert-Mauchly Award, and was recognized by the School of Engineering at UCLA for Alumni Achievement in Academia. Since then he has won the ACM-SIGARCH Distinguished Service Award, ACM-SIGOPS Hall of Fame Award, and the 2012 Jean-Claude Laprie Award in Dependable Computing from IFIP Working Group 10.4 on Dependable Computing and Fault Tolerance. In 2016 he was given the Richard A. Tapia Achievement Award for Scientific Scholarship, Civic Science and Diversifying Computing[15]

In 2013 he set the American Powerlifting Record for the state of California for his weight class and age group in bench press, dead lift, squat, and all three combined lifts.

On February 12, 2015, IEEE installed a plaque at UC Berkeley to commemorate the contribution of RISC-I[16] in Soda Hall at UC Berkeley. The plaque reads:

  • IEEE Milestone in Electrical and Computer Engineering
  • First RISC (Reduced Instruction Set Computing) Microprocessor
  • UC Berkeley students designed and built the first VLSI reduced instruction-set computer in 1981. The simplified instructions of RISC-I reduced the hardware for instruction decode and control, which enabled a flat 32-bit address space, a large set of registers, and pipelined execution. A good match to C programs and the Unix operating system, RISC-I influenced instruction sets widely used today, including those for game consoles, smartphones and tablets.

On March 21, 2018, he was awarded the 2017 ACM A.M. Turing Award together with John L. Hennessy for developing RISC.[7] The award attributed them for pioneering "a systematic, quantitative approach to the design and evaluation of computer architectures with enduring impact on the microprocessor industry".[8]

Charity[edit]

From 2003 to 2012 he rode in the annual Waves to Wine MS charity event as part of Bike MS; a 2-day cycling adventure. He was the top fundraiser in 2006, 2007, 2008, 2009, 2010, 2011, and 2012.[17]

Notable Ph.D. students[edit]

He has advised a number of notable Ph.D. candidates, including[18]:

Selected works[edit]

Books[edit]

He co-authored seven books, including two with John L. Hennessy on computer architecture: Computer Architecture: A Quantitative Approach (6 editions—latest is ISBN 978-0128119051) and Computer Organization and Design RISC-V Edition: the Hardware/Software Interface (5 editions—latest is ISBN 978-0128122761). They have been widely used as textbooks for graduate and undergraduate courses since 1990.[citation needed] His most recent book is with Andrew Waterman on the open architecture RISC-V: The RISC-V Reader: An Open Architecture Atlas (1st Edition) (ISBN 978-0999249109).

Articles[edit]

References[edit]

  1. ^ "Charles P. "Chuck" Thacker is the recipient of the 2017 Eckert-Mauchly Award". awards.acm.org.
  2. ^ David Patterson at the Mathematics Genealogy Project
  3. ^ "People of ACM - David Patterson". www.acm.org.
  4. ^ https://research.google.com/pubs/105290.html
  5. ^ "Board of Directors - RISC-V Foundation".
  6. ^ a b Milestones in computer science and information technology by Edwin D. Reilly 2003 ISBN 1-57356-521-0 page 50
  7. ^ a b "Computer Chip Visionaries Win Turing Award". The New York Times. 2018-03-21.
  8. ^ a b "John Hennessy and David Patterson will receive the 2017 ACM A.M. Turing Award". www.acm.org. Retrieved 2018-03-21.
  9. ^ a b "David Patterson: Biography". Computer History Museum. 2007.
  10. ^ Patterson, D. A., "Verification of Microprograms," Technical Report No. UCLA-ENG-7707, UCLA Computer Science Department, January 1977.
  11. ^ Linda Null; Julia Lobur (14 February 2014). The Essentials of Computer Organization and Architecture. Jones & Bartlett Learning. p. 512. ISBN 978-1-284-15077-3.
  12. ^ a b "CRA Service Awards 2006". archive.cra.org.
  13. ^ "Recipients".
  14. ^ "Archived copy". Archived from the original on 2013-02-06. Retrieved 2013-02-16.CS1 maint: Archived copy as title (link)
  15. ^ "Richard A. Tapia Achievement Award - Tapia Conference". tapiaconference.org.
  16. ^ "IEEE SCV Silicon Valley Technology History Committee". sites.ieee.org.
  17. ^ "Berkeley's Anti-MS Crew". anti-ms-crew.berkeley.edu.
  18. ^ "David Patterson's PhD Students".

External links[edit]

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